FalCAD
FalCAD is an open design suite for electronics and computer engineering. Schematics, printed circuit boards, circuit simulation, microcontroller firmware and HDL (Verilog, SystemVerilog, VHDL) live in one versioned project, and the tools share one identity for every part, pin and net.
What makes it different
- Your projects are yours. The
.falcadformat is open, human-readable JSON that works with Git. Local work needs no account and no subscription, and nothing is uploaded unless you choose to share. - Real engines, honestly labelled. Every feature carries a status: verified, experimental, prototype, planned or unsupported. Verified means automated tests exercise it end to end. The capability matrix is generated from the engines themselves.
- One project, many disciplines. A schematic net is the same object in the netlist, the simulator, the board and the bill of materials.
- Safe by design. Untrusted projects, extensions, automation and HDL jobs are all treated as attack surfaces. Hardware is never programmed without a local person approving the exact firmware.
What works today
| Area | Status |
|---|---|
| Schematic editing, connectivity, electrical rule check | Verified |
| Analog simulation (operating point, DC sweep, transient, AC), checked against closed-form answers | Verified |
| Digital logic simulation and VCD export | Verified |
| PCB: placement, routing helpers, DRC, Gerber X2 / Excellon / BOM / pick-and-place with checksums | Verified by independent parsers in tests; not yet accepted by a fabricator |
| HDL synthesis with Yosys (WebAssembly, no install) and iCE40 place-and-route | Synthesis verified; iCE40 bitstreams experimental |
| ATmega328P (Arduino Uno MCU) emulation | Verified with assembled firmware; Arduino sketch compilation needs arduino-cli |
| Validated multi-user editing protocol | Verified in the protocol test suite; cloud service under development |
| Mechanical 3D CAD | Planned |
See Getting started.